SciEngines provides scalable high-performance cryptanalysis systems for professionals. Since not every user has an informatics degree, SciEngines strives to make the systems as user-friendly as possible without sacrificing performance or functionality. For this reason, not only has hardware-development and IP-core design been a major R&D focus for SciEngines but also the creation of easy-to-use command-line and graphical user interfaces. The command-line provides furthermore an output-mode for machine-interfacing for automated analysis pipelines or easy integration into 3rd party systems. Please see below some examples of cryptanalysis-focused tools of SciEngines incorporating the available cryptanalysis chip designs for use on RIVYERA hardware:
se_cryptosuite is SciEngines graphical user-interface for se_decrypt. It provides an intuitive way to manage work-queues and the specifics for individual analysis processes. Variations for addressing specific requirements of large-scale users are possible.
Graphical User Interface to se_decrypt
Recover encrypted files with just a click
Enqueue and structure multiple jobs
Always keep track of your current recovery status
se_decrypt is SciEngines main cryptanalysis framework. It provides the functionalities required for effective large-scale processing such as keyspace distribution, resume-point setting, rules setting, dictionary loading and similar. Usability features allow the specification of encrypted files, containers or packet captures that are then automatically scanned for the information necessary for further processing without manual input from the users.
Since se_decrypt interfaces with the scalable RIVYERA API but can also be run in a standalone mode, can be deployed on all system-sizes from small and mobile setups to large-scale clusters with thousands of FPGAs and even systems without FPGA-acceleration can run se_decrypt.
Command line tool and crypto-backend
Make use of a rich rules set in brute-force as well as in dictionary mode
Fully exploit the compute power of distributed SciEngines FPGA clusters